The present invention relates to comparators and, more particularly, to controlling input offset voltages in comparators.
A comparator is an operational cell/unit commonly used in modern analog and/or mixed-signal integrated circuits. For example, a comparator may be the principle part of an analog-to-digital converter (ADC) and can have a significant impact on the resultant performance of any integrated circuit including the ADC. When used in an ADC, the comparator can strongly affect the ADC's resolution. A comparator's performance can be affected by a number of things such as component device mismatches caused by manufacturing process variations and the like. These mismatches can result in a comparator having significant input offset voltage(s), which affects the output, therefore resulting in non-ideal performance, and so it is critical to control the input offset voltage. The input offset voltage may be defined as a Direct Current (DC) voltage difference that occurs between the two differential inputs of the amplifier circuit within a comparator, for example an operational amplifier (op-amp) circuit. The voltage difference may be overcome by applying a suitably sized polar opposite bias voltage so that the comparator output is actually zero when the two input voltages are nominally the same. The provision and application of such input offset voltage(s) may be done by offset cancellation circuits, and among the different types of offset cancellation circuits, body biasing approaches are commonly used.
Most body biasing methods need a high gain auxiliary amplifier in an offset cancellation phase, but this high gain auxiliary amplifier requires additional space, which can increase die size, and equally importantly, the high gain auxiliary amplifier itself has an inherent input offset, meaning the auxiliary amplifier itself will degrade the overall offset cancellation performance of resultant comparator.